dsPICDEM? 1.1 Plus Development Board User’s Guide
5.1.8
Digital Potentiometer
A single channel digital potentiometer, MCP41010, is provided on the development
board. Control of the digital potentiometer is via the dsPIC DSC SPI 2 communication
channel. The output of the digital potentiometer is applied to a low-pass filter with a
cutoff frequency of approximately 4 kHz. The output of the LP filter is connected to the
analog channel AN3 of the dsPIC DSC device.
The schematic of the digital potentiometers is shown in Figure A-4: “dsPICDEM? 1.1
5.1.9
LCD Graphic Display
The LCD graphic display is a PG12232D-L 8-bit 122 x 32 dot-matrix LCD controlled by
a PIC18F242 LCD controller. The dsPIC30F device accesses the LCD controller via
the SPI 2 port. For a detailed description of the communication protocol, see
The LCD PIC18F242 controller is reset by setting jumper J10 to the MCLR2 position
and pressing the Reset switch. Moving jumper J10 back to the MCLR1 position returns
Reset control of the dsPIC30F device.
The schematic of the analog potentiometers is shown in Figure A-6: “dsPICDEM?
5.1.10
ICD Connector
Using modular connector ICD, the MPLAB ICD 2 can be connected for low-cost
programming and debugging of the dsPIC30F/33F or PIC24H/24F device.
? Programming and debugging of dsPIC30F devices requires that jumper J8 is set
to the 30F position and jumper J10 is set to the MCLR1 position.
? Programming and debugging of dsPIC33F/PIC24H/PIC24F devices requires that
jumper J8 is set to the 33F PGC1 and 33F PGD1 (or to the 33F PGC3 and 33F
PGD3) position and jumper J10 is set to the MCLR1 position.
Programming the PIC18F242 LCD controller requires that jumper J8 is set to the
RB6/242 and RB7/242 position and jumper J10 is set to the MCLR2 position. The
PIC18F242 LCD controller is programmed at the factory with the LCD driver code.
Under normal operating conditions, no additional programming should be required for
this device.
The schematic of the analog potentiometers is shown in Figure A-6: “dsPICDEM?
5.1.11
Si3000 Voice Band Codec
An Si3000 Codec from Silicon Labs is included on the development board. Stereo
Jacks provide MIC input on J16 and SPKR OUT output on J17. LINE I/O on J12
provides line-in and line-out connections. J9 provides a selection for Master or Slave
operation for the Si3000. When the Si3000 is operated in Master mode, the user must
provide a suitable clock oscillator in the U6 socket. The CODEC RESET switch resets
the Si3000.
For detailed operational information, refer to the Si3000 data sheet available on
www.silabs.com. For a schematic of the Si3000 circuit, see Figure A-6: “dsPICDEM?
DS70099D-page 64
? 2006 Microchip Technology Inc.
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